ls3c5000l specification
frequency
2.0ghz–2.2ghz
computing speed
560gflops
number of cores
16
processor core
based on loongarch; supporting 128/256-bit vector instructions; 4-issue out-of-order execution; 4 fixed-point units, 2 vector units, and 2 memory access units high-speed cache: each processor core contains a 64kb private l1 instruction cache and a 64kb private l1 data cache. each processor core contains a 256kb private l2 cache. every four
high-speed cache
each processor core contains a 64kb private l1 instruction cache and a 64kb private l1 data cache. each processor core contains a 256kb private l2 cache. every four processor cores share a 16mb l3 cache, which is 64mb in total.
memory controller
four 72-bit ddr4-3200 controllers; supporting ecc
high-speed i/o
four hypertransport 3.0 controllers; supporting cc-numa
other i/o
1 spi, 1 uart, 3 i2cs, and 16 gpio interfaces
power management
supporting dynamic shutdown of the clocks of main modules; supporting dynamic frequency scaling in main clock domains; supporting dynamic voltage scaling in main voltage domains
typical power consumption
130w@2.2ghz